The batch on VLSI Physical Design is scheduled to begin in July 2019. This will be a 6 month extensive course (Monday thru Friday) focusing on vital aspects of Physical Design and getting the student ready for the real-world. The course includes both theory and Lab. It is 15% Theory, and 85% Lab work, with real-world exercises and projects as required by the industry.
The Instructor for the Course is Rajesh Advani, an experienced VLSI Designer of several years in the industry. Standard Electronic Design Automation Software will be used for the Labs. This will include Synopsys ICC or similar, Synopsys PrimeTime or similar, L-edit or similar.
The Quality of the Course and Course Content is similar to that of a reputed US University. Note that Course Materials will be presented on a Screen during Lectures, but owing to the Confidential nature of these documents, will not be handed out to the students. Students can however take notes during the lectures. For certain material that is not Confidential, notes will be handed out, at a cost of the Actual Xerox charge.
An Entrance Test is required which will be held at KJSCE College in Feb 2019. KJSCE will announce the dates shortly. Topics include Basic Logic Design (Chapters 1, 3, and 4 from the book Modern Digital Electronics by RP Jain, available for free download from the net), and an Aptitude Test (similar to GRE Analytical Section)
Eligibility: BSc / MSc Physics, Mathematics. BE / MS / M. Tech Computer Science / Electrical / Electronics / Instrumentation.
For Further queries, Please send an email to
Or call 9819927717